1. Field of the Invention
Embodiments of the invention generally relate to circuit design emulation systems and, more specifically, to a method and apparatus for controlling power in an emulation system.
2. Description of the Related Art
Hardware based functional design verification systems, often referred to as emulators or simulation accelerators, are devices that allow functional verification of a user's logic design prior to fabrication of the design into an integrated circuit (IC). The logic design at this stage is often referred to as the design under tests, (DUT), or design under verification (DUV). Because it is very expensive and time consuming to fabricate a design into silicon, it is desirable to use an emulator to debug the logic to remove functional errors prior to fabrication. Design verification systems allow chip designers to test and debug their design prior to incurring the cost and time of fabrication. Once a user's design is functionally verified, it is then possible to use the emulator to design and test other features of the system. These emulators have thus become quite heavily relied upon in the IC design industry.
Some emulation systems contain an interconnected array of emulation processors. Each emulation processor can be programmed to evaluate logic functions. The program-driven processors operate together as an interconnected unit, emulating an entire desired logic design. Such emulation systems are available from various vendors, including Cadence Design Systems, Inc., San Jose, Calif., among others.
As integrated circuit designs grow in size, more emulation processors are required to accomplish the emulation task. Due to the increasing number of emulation processors, the power and cooling requirements of processor-based emulation systems are relatively high. Historically, this has meant that users of such systems must provide users, where the requirements of such specialized equipment are onerous. As such, there is a need in the art to control power in an emulation system.